Company Products Tech.Info Notice    Dev.Tools Home > Developement Guide > FAQ FAQ HMS30C7202  :  ADCLCDPMU PLL RESETSDRAM SMI MMCUART CAN SPI USBTIMER PWM PS2 KEDGPIOAPPLICATION HMS30C7201  :  ADCPMU PLLETCAPPLICATION [PMU] Q1. [PMU] Is there a delay required after we write to Clkcntrl register with bit[6]=1? A1. Setting PLL freq. using "bit[6] = 1" requires no delay and PLL freq. is changed instaneously. [PCMCIA] Q2. [PCMCIA] Is it possible to connect the 7201 directly to a PCMCIA card (without additional buffers)? A2. Yes, It is possible to connect the 7201 directly to a PCMCIA card, if the voltage level is 3.3V. [LCD] Q3. [LCD] Can we also interface displays with other resolutions besides these by writing into appropriate LCD control registers? A3. Yes. Q4. [LCD] To get the reference Platform up and running ... we will need a Display, Touch screen, keyboard, Power Supply. Is it included in the scope of supply. If not .. will it be possible for you to provide us with these at the time of supply ? The display can be either Mono or STN Color. If not .. can you recommend a Vendor who can supply these to us ? A4. You can use vga interface for displaying. Our reference board have connector containing all of lcd interface pin. After you select lcd type, you have to wiring to this connector (J407). [ADC] Q5. [ADC] Does the reference platform include the circuit for a backlight and a Touch Screen Interface. From the investigation of the circuit it seems it does ... but the application notes doesn't make any mention of it. Can you please clarify? A5. Yes, we have backlight and touch screen interface.Touch screen interface same with all resistive touch panel interface. As to backlight, this is different from lcd type. And you should select according to lcd specification. Q6. [ADC] This in reference to the operation of the A/D convertor. Is it correct to assume that : Analog inputs AN0, AN1 are used for the Touch Screen AN2 is used for mains voltage monitoring AN3 is used for backup battery monitoring AN4 is used for the Speaker Input A6.PMU and PLLs of HMS30C7201 made for 3.6864MHz input clock and MagnaChip do not garentee with other input clock. But there may be some marginal range for input clock.If 7202 worked fine with somewhat higher or lower clock by customer's experiments, then user should have to check the voltage of PLLFILT pins. In normal, PLLFILT pin stay about 30%~70% of PLL VDD. If PLLFILT voltage goes too close to PLL VDD or ground("0"), PLL will not work fine.If user wanted to use two input clock in field, input clock shoud be changed during deep sleep state. [SMI] Q7. [SMI] Can CLKEN bit in MEMCFG0 … MEMCFG5 be all set to logic 1 ? If so,will it be correct to assume that whenever the ARM accesses either of these chip selects ( CS0 to CS5 ), the BUSCLK will generate a CLK corresponding to the HALF the system CLK ? ( If the core is running at 60 MHz, the BUSCLK will will BE 30 MHz frequency ). A7. Yes. [UART] Q8. [UART] In the Non-PDA Reference Development Kits, will it be possible for you to give us a bootloader where we can download the code using the on board UART ( serial UART 1 or 2 ) instead of the debug UART 3 ? A8. Yes. But in case of you using serial port, downloading speed is very low. [GPIO] Q9. [GPIO] We wish to configure the GPIO pins to generate an interrupt, when a logic 0 is generated or when a logic 1 is generated. Will it be correct to assume the following ? Interrupt Generated when logic 0 is present on a Port pin PIM ( Interrupt mask ) = 1 PIE ( Interrupt Edge ) = 0 PIP ( Interrupt Polarity ) = 1 Interrupt Generated when logic 1 is present on a Port pin PIM ( Interrupt mask ) = 1 PIE ( Interrupt Edge ) = 0 PIP ( Interrupt Polarity ) = 0 A9. Yes. Q10. [GPIO] We wish to configure the GPIO pins to generate an edge triggered interrupt, Will it be correct to assume the following : PIM ( Interrupt mask ) = 1 PIE ( Interrupt Edge ) = 1 PIP ( Interrupt Polarity ) = How will this register need to be configured for rising edge and falling edge interrupt ? A10. In case of rising edge, the value is '0'. In case of falling edge, the value is '1'. [ETC] Q11.[ETC] Are the following Peripherals supported by 7201? - iRDA Interface - Two Serial Ports for debugging the device - PCMCIA Interface for PCMCIA Card and Compact Flash - MMC Interface using SPI - Two serial ports and one parallel port - Keyboard interface A11. Yes, supports above functions. Q12. [ETC] What kind memories are there on the 7201 reference board? A12. - Flash 4 MB x 4 (total 16 MBytes) - SDRAM 16 MB x 2 (total 32 MBytes) - 1MB SRAM - 512 KB EPROM for Bootcode Q13. [ETC] What is the output drivability of each of the pins on GMS30C7201 in terms of current sourcing and sinking ? A13. Please refer to Chapter 15.2 of datasheet. Q14. [ETC] What is the the output compliance in terms of Voltage for each of these pins ? ( i.e What does VoL and VoH correspond to if the pin is an ouput and what does ViL and ViH correspond to in case it is an input ). A14. Please refer to chapter 15 of data sheet. Q15. [ETC] Is the piccolo disabled by default? What is the command to enable/disable the piccolo and when should it be performed? A15. Piccolo is enabled by default. If you don't use Piccolo, you have to disabled it to save power. [JTAG] Q16. [JTAG] Does 7201 support JTAG Interface with connectors for Multi ICE and Imbedded ICE ? A16. Yes [F/W] Q17. [F/W] Does the Bootcode in the EPROM incorporate routines for programming the on board FLASH ? If not ... how can we program the on board FLASH and change the OS to WIN CE ? A17. We provide test program for downloading image. Please refer to eval05.zip file of MagnaChip web-site. Q18. [F/W] Is Angel Debug Monitor port available for the Reference Platform ? A18. You can use serial port for using armon program. Please refer to armon.zip of MagnaChip web-site. Q19. [F/W] Is it possible to get the source for the boot loader that is there in the EPROM ? A19. Yes. [OS] Q20. [OS] Can you tell me what Linux distributions are ported to the Hyundai ARM7 SOC? We have been in contact with PalmPalm who have said that they have already ported their Linux distribution (Tynux) to the Hyundai ARM7 SOC. Are there other Linux ports in development or planned for the future? A20. We already finished linux proting on 7201 reference board. You can download all linux driver source from MagnaChip web-site.http://www.MagnaChip.com/eng/products/frset/pro_set1.html Q21. [OS] As I had mentioned to you, we are currently evaluating the use of Linux but we will also like to evaluate the use of Win CE also. Since currently we are in the process of evaluating Linux, we would like the reference platform to be loaded with Linux. A21. Linux driver and image are loaded in MagnaChip web-site.If you download linux image to flash memory again, you can use linux flatform. Q22. [OS] We will also want copies of Linux and Win CE ported to the reference platform with the necessary device drivers. I hope these are included. A22. You can downloadw all driver and data through MagnaChip web-site. [USB] Q23. [USB] GMS30C7201 USB vendor ID and peripheral ID? A23. VID: 0x05B4, PID: 0x0018 Q24. [USB] Is GMS30C7201 USB Bulk Max. Transfer Length is 32 Bytes? A24. Yes. USB Bulk Transfer Length is 32 Bytes. Q25. [USB] Is there a way to control the Bulk Transfer Length during USB communication process? A25. No. 7201' USB can not control Transfer Length. Only fixed transfer length (32Bytes). So you must put 32 Bytes at the USB FIFO for transfer. Q26. [USB] According to the Data Sheet the USB Device Controller is USB 1.0 compliant. Can we use the processor to implement USB 1.1 compliant communication to an USB host? What is missing compared to a USB 1.1 Device Controller? A26. First of all, USB in 7201 is USB 1.1 compliant, and now used by various customers especially for handheld device's connection port as slave side.As far as I know, there are some differences in 'Electrical spec.' between USB 1.0 and USB 1.1. But 7201 has some limitation on using control pipe (endpoint 0). Only setup process can be conducted, like connection, address assignment, endpoint configuration and bus numeration as stated in user's guide. So, we use S/W protocol in bulk pipe (endpoint 1, 2) to transfer command and status. Q27. [USB] Does the limitation mean that command and status to the device may get lower priority than control messages to other devices as bulk pipes has lower priority than Control, Interrupt and Isochronous transfers? Or is there both bulk and control pipes to endpoint 1 and 2? A27. Yes, you are right. Command (send or receive data, get reply of transmission… etc.) and status (checksum of data what we added for perfection etc.) has lower priority than basic control messages. But, the limitation on control pipe (I.E endpoint 0) is not the basic function of it. I mean all the setup and hardware oriented protocols like configuration normally work.It could be some burden to bulk pipe because bulk pipe doing another job instead of doing only data handling. The endpoints we assigned do, - Control pipe (endpoint 0): connection, address assignment, endpoint configuration and bus numeration - Bulk pipe (endpoint 1, 2): command (receive data, send data, send status to target, reply status to host ...), status (to check correct data or not) and data Q28. [USB] In order to let the CPU read the configuration ROM is that made by setting CPUMODE = 1 in the TicSEL register? On which address is the information then found? A28. No, there's no way CPU can read the configuration ROM. Q29. [USB] So if we do not want to use DMA is an USB interrupt generated each time FIFO is filled/empty if we select CPU access mode and TIC mode enabled? From your answer I understand that the data in this case are found in the TicRX/TXDATA registers instead of the RX/TXDATA registers. A29. Yes, you should Q30. [USB] What is the format of the data in the the FIFO buffers? At reception I assume that the PID and CRC fields are removed, so only the data payload can be found in the FIFO. How can the user program find out how many Bytes in the FIFO that are valid, in case a packet is shorter than 32 Bytes? A30. 7201 USB has some draw-backs. One of them is transfer size should be 32 Bytes. No other size transfer is allowed. So, the software should have make the last transfer to 32 Bytes word with zero padding or some other schemes. Q31. [USB] According to USB spec.1.1 section 5.8.3, an endpoint can indicate end of transfer by sending a packet with less than maximum size or a zero length packet. What happens in the 7201 HW if a Windows 2000 PC sends less than maximum size or zero length Packet? Is it an error with nothing put in the FIFO in both cases? A31. Yes you are right. General USB Device Controller should support the arbitrary number of Data Byte Transmission which is less then Maximum Size. But As I informed you, Our USB Device Controller has a draw-back so, only transmit Maximum Packet Size. Q32. [USB] is it necessary to connect an external line driver? (7201 USB) A32. 7201 USB need external transceiver. (PDIUSB11A) Q33. [USB] Is it possible to run 7201 in low speed mode? A33. The USB in 7201 can't operate with low speed mode. There are some reasons. First, the bulk transfer mode can't be operated in low speed mode. Second, it is necessary to change the descriptor ROM in USB controller of 7201 if you want to use other transfer mode but bulk transfer mode. [FAQ] < Reference Code > Sometimes 7201 USB sends/receives same packet twice Application Code> Initialization USlaveBlock_t * uslave720x_setup (int PktMode, int HeartBeat) function [uslv.c] us->NoTx = 0; us->NoRx = 0; TX: static int uslave7201_send(USlaveBlock_t *us, int *data, int size ) function [uslv.c], if( us->PktMode == O_US_PACKET ) { header = ((US_DATASYNC << 16)&0x0ffff0000) | ((us->NoTx << 8)&0x0ff00) | ((~us->NoTx)&0x0ff); ret = ring->put(ring, header); us->NoTx ++; } RX : static void uslave7201_interrupt(int level) function [uslv.c] if((usd.u.pkt.sync&0x0ffff) == (US_DATASYNC&0x0ffff) && usd.u.pkt.SeqNo == uslb.NoRx) { ring->putData(ring, &usd.u.data[1], US_FIFO_SIZE-1); uslb.NoRx ++; } Application and F/W Program checks the packet frame Number. If you use Low Speed Device (USB mice/keyboard) and 7201 USB in same hub, our 7201 USB has the problem. static void uslave7201_interrupt(int level) [uslv.c] if (uslb.HeartBeat == TRUE) { _outw(US_TXDATA,((US_HEARTBEAT << 16)&0x0ffff0000) | \ (~US_HEARTBEAT & 0x0ffff) ); _outw(US_TXDATA,US_HEARTBEAT_INTERVAL); for( i = 0; i _outw(US_TXDATA, 0); uslb.nHeartBeat ++; } Application Program checks the HeartBeat packet frame. When TX FIFO data is transferred in 7201 USB block (PC-IN packet), Data out order (32Bytes size) is MSB Byte first and LSB Byte last. But To become correct operation, order is LSB first and MSB last TX FIFO 4Bytes MSB                           LSB 1 2 3 4 Data out order [1 - 2 - 3 - 4] But 7201 USB TX sends Data out order [4 - 3 - 2 - 1] in 1 Word (4 Bytes) So we swap the 4 Bytes Data order in application program. unsigned int swapByte(unsigned int dwdata) { unsigned int temp; unsigned int swapdata = 0; temp = dwdata; swapdata |= (temp >> 24) & 0x000000ff; temp = dwdata; swapdata |= ((temp >> 16) & 0x000000ff) << 8; temp = dwdata; swapdata |= ((temp >> 8) & 0x000000ff) << 16; temp = dwdata; swapdata |= (temp & 0x000000ff) << 24; return swapdata; }