/**
 *******************************************************************************
 * @file        hal_uart_version.txt
 * @author      ABOV R&D Division
 * @brief       specific version for UART
 *
 * Copyright 2022 ABOV Semiconductor Co.,Ltd. All rights reserved.
 *
 * This file is licensed under terms that are found in the LICENSE file
 * located at Document directory.
 * If this file is delivered or shared without applicable license terms,
 * the terms of the BSD-3-Clause license shall be applied.
 * Reference: https://opensource.org/licenses/BSD-3-Clause
 ******************************************************************************/

/**
 * @addtogroup  HAL HAL (Hardware Abstraction Layer)
 * @{
 * @defgroup    HAL_UART UART
 * @{
 * - Universal Asynchronous Receiver/Transmitter (UART) is asynchronous serial communication protocol.
 * - It is capable of a full-duplex asynchronous serial communication by configuring baud-rate, data bit, parity bit and stop bit.
 * - The communiation status is available via line status information such as Parity error, Overrun, Frame error.
 *
 * <B> [ UART version per ABOV 32bit chipset] </B>
 *
 * <table>
 * <tr> <td> <center><B> ABOV ARM Cortex-M 32bit </B></center>
 * <table>
 * <tr>
 *     <td> <center><B>A31xxxx series\n Cortex-M0+</B></center>\n
 * <table>
 * <tr>
 *     <th > <center>Type</center> 
 *     <th> <center>Version</center> 
 *     <th> <center>Chipset</center>
 * <tr><td> <center>V</center> <td> 01.00.00 <td> A31G21x, A31T21x
 * <tr><td> <center>V</center> <td> 01.00.01 <td> A31G31x
 * <tr><td> <center>V</center> <td> 01.00.02 <td> A31G22x
 * <tr><td> <center>V</center> <td> 01.00.05 <td> A31G11x, A31G12x, A31L21x, A31L12x, A31L22x, A31S13x
 * <tr><td> <center>V</center> <td> 01.00.08 <td> A31C14x, A31C12x
 * </table>
 *     <td> <center><B>A33xxxx series\n Cortex-M3</B></center>\n
 * <table>
 * <tr>
 *     <th > <center>Type</center> 
 *     <th> <center>Version</center> 
 *     <th> <center>Chipset</center>
 * <tr><td> <center>V</center> <td> 01.00.04 <td> A33G52x, A33G53x
 * <tr><td> <center>V</center> <td> 01.00.03 <td> A33M11x
 * <tr><td> <center>N/A</center> <td><center>N/A</center><td><center>N/A</center>
 * </table>
 *     <td> <center><B>A34xxxx series\n Cortex-M4</B></center>\n
 * <table>
 * <tr>
 *     <th > <center>Type</center> 
 *     <th> <center>Version</center> 
 *     <th> <center>Chipset</center>
 * <tr><td> <center>V</center> <td> 01.00.03 <td> A34M41x, A34M42x
 * <tr><td> <center>V</center> <td> 01.00.06 <td> A34G43x
 * <tr><td> <center>V</center> <td> 01.00.07 <td> A34L71x
 * <tr><td> <center>N/A</center> <td><center>N/A</center><td><center>N/A</center>
 * <tr><td> <center>N/A</center> <td><center>N/A</center><td><center>N/A</center>
 * </table>
 * </table>
 * </table>
 *
 */

/** @} */
/** @} */
